Description
74HC139; 74HCT139 Dual 2-to-4 line decoder/demultiplexer Rev.4 * 11 December 2015 Product data sheet 1.General .
The 74HC139; 74HCT139 decodes two binary weighted address inputs (nA0, nA1) to four mutually exclusive outputs (nY0 to nY3).
Features
* Input levels:
* For 74HC139: CMOS level
* For 74HCT139: TTL level
* Demultiplexing capability
* 2 independent 2-to-4 decoders
* Multifunction capability
* Suitable for memory decoding, data routing or code conversion
* Complies with JEDEC standard no. 7A
* Activ