74HCT109 Datasheet (Philips) - Dual JK flip-flop

74HCT109, Dual JK flip-flop

The 74HC/HCT109 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard no.

7A.

The 74HC/HCT109 are dual positive-edge triggered, JK flip-flops with individual J, K inputs, clock (CP) inputs, set QUICK REFER

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT109 Dual JK flip-flop with set and reset; positive-edge trigger Product speciﬁcation Supersedes data of December 1990 File under Integrated Circuits, IC06 1997 Nov 25 Philips Semiconductors Product speciﬁcation Dual