Datasheet4U Logo Datasheet4U.com

74HCT109 Datasheet - Philips

74HCT109 Dual JK flip-flop

The 74HC/HCT109 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT109 are dual positive-edge triggered, JK flip-flops with individual J, K inputs, clock (CP) inputs, set QUICK REFER.
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT109 Dual JK flip-flop with set and reset; positive-edge trigger Product speciļ¬cation Supersedes data of December 1990 File under Integrated Circuits, IC06 1997 Nov 25 Philips Semiconductors Product speciļ¬cation Dual .

74HCT109 Datasheet (65.68 KB)

Preview of 74HCT109 PDF
74HCT109 Datasheet Preview Page 2 74HCT109 Datasheet Preview Page 3

Datasheet Details

Part number:

74HCT109

Manufacturer:

Philips

File Size:

65.68 KB

Description:

Dual jk flip-flop.

📁 Related Datasheet

74HCT10 Triple 3-input NAND gate (Philips)

74HCT10 Triple 3-input NAND gate (nexperia)

74HCT10-Q100 Triple 3-input NAND gate (nexperia)

74HCT107 Dual JK flip-flop (Philips)

74HCT107 Dual JK flip-flop (nexperia)

74HCT107-Q100 Dual JK flip-flop (nexperia)

74HCT107D Dual JK flip-flop (nexperia)

74HCT109 Dual JK flip-flop (nexperia)

TAGS

74HCT109 Dual flip-flop Philips

74HCT109 Distributor