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74HCT112 Datasheet - Philips

74HCT112 Dual JK flip-flop

The 74HC/HCT112 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT112 are dual negative-edge triggered JK-type flip-flops featuring individual nJ, nK, clock (nCP), set (nSD) and res.
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT112 Dual JK flip-flop with set and reset; negative-edge trigger Product speciļ¬cation Supersedes data of December 1990 File under Integrated Circuits, IC06 1998 Jun 10 Philips Semiconductors Product speciļ¬cation Dual .

74HCT112 Datasheet (106.77 KB)

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Datasheet Details

Part number:

74HCT112

Manufacturer:

Philips

File Size:

106.77 KB

Description:

Dual jk flip-flop.

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74HCT112 Dual flip-flop Philips

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