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74LVC273 - Octal D-type flip-flop

Datasheet Summary

Description

The 74LVC273 is an octal positive-edge triggered D-type flip-flop.

Features

  • Wide supply voltage range from 1.2 V to 3.6 V.
  • Overvoltage tolerant inputs to 5.5 V.
  • CMOS low power consumption.
  • Direct interface with TTL levels.
  • Output drive capability 50 Ω transmission lines at +85 °C.
  • Complies with JEDEC standard:.
  • JESD8-7A (1.65 V to 1.95 V).
  • JESD8-5A (2.3 V to 2.7 V).
  • JESD8-C/JESD36 (2.7 V to 3.6 V).
  • ESD protection:.
  • HBM JESD22-A114F exceeds 2000 V.
  • MM JESD22-A115-.

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Datasheet preview – 74LVC273

Datasheet Details

Part number 74LVC273
Manufacturer nexperia
File Size 254.85 KB
Description Octal D-type flip-flop
Datasheet download datasheet 74LVC273 Datasheet
Additional preview pages of the 74LVC273 datasheet.

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Full PDF Text Transcription

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74LVC273 Octal D-type flip-flop with reset; positive-edge trigger Rev. 8 — 31 August 2021 Product data sheet 1. General description The 74LVC273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding D inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A LOW on MR forces the outputs LOW independently of clock and data inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. 2.
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