Datasheet4U Logo Datasheet4U.com

AK594096BS - 4194304 Word by 9 Bit CMOS Dynamic Random Access Memory

General Description

The Accutek AK594096 high density memory module is a CMOS random access memory organized in 4 Meg x 9 bit words.

Key Features

  • 4,194,304 x 9 bit organization.
  • Low Profile 30 pad (SIM) Single In-Line Memory.
  • Low Profile 30 pin (SIP) Single In-Line package.
  • JEDEC standard pinout.
  • Common CAS, RAS and WE for the lower eight bits.
  • CAS-before-RAS refresh PIN.

📥 Download Datasheet

Datasheet Details

Part number AK594096BS
Manufacturer ACCUTEK
File Size 144.77 KB
Description 4194304 Word by 9 Bit CMOS Dynamic Random Access Memory
Datasheet download datasheet AK594096BS Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
AK590 AK SERIES VERTICAL ETC
AK520S ISDN SINGLE CHIP NT1/(U&S/T-INTERFACE) TRANSCEIVER Asahi Kasei Microsystems
AK5340-VS CMOS 18 Bit 2 Channel A/D Converter ETC
AK5351 Enhanced Dual bit 20bit ADC Asahi Kasei Microsystems
AK5352 96kHz Sampling 20bit ADC Asahi Kasei Microsystems

Other Datasheets by ACCUTEK

Part Number Description
AK594096BG 4194304 Word by 9 Bit CMOS Dynamic Random Access Memory
AK594096AG 4194304 Word x 9 Bit CMOS Dynamic Random Access Memory
AK594096AS 4194304 Word x 9 Bit CMOS Dynamic Random Access Memory
AK591024AG 1048576 Word x 9 Bit CMOS Dynamic Random Access Memory
AK591024AS 1048576 Word x 9 Bit CMOS Dynamic Random Access Memory

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
MICROCIRCUIT CORPORATION DESCRIPTION The Accutek AK594096 high density memory module is a CMOS random access memory organized in 4 Meg x 9 bit words. The assembly consists of two 4 Meg x 4 and one 4 Meg x 1 DRAMs, mounted on the front side of a printed circuit board in 30 pad SIM (leadless) or 30 pin SIP (leaded) configuration with JEDEC-standard pinouts. Designed especially for low-height applications such as VMEbus boards, this low profile module is 0.550 inch high. The operation is identical to nine 4 Meg x 1 DRAMs. For the lower eight bits, data input is tied to data output and brought out separately for each bit, with common RAS and CAS control. This common I/O feature dictates the use of early-write cycles to prevent contention of data In and data out.