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DF122 - CMOS Gate Array

Download the DF122 datasheet PDF. This datasheet also covers the DF121 variant, as both devices belong to the same cmos gate array family and are provided as variant models within a single manufacturer datasheet.

General Description

DF12x is a family of static, master-slave D flip-flops.

SET and RESET are asynchronous and active low.

Outputs are buffered and change state on the rising edge of the clock.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (DF121-AMI.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number DF122
Manufacturer AMI
File Size 48.17 KB
Description CMOS Gate Array
Datasheet download datasheet DF122 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
')[ ® $0,+*  PLFURQ &026 *DWH $UUD Description DF12x is a family of static, master-slave D flip-flops. SET and RESET are asynchronous and active low. Outputs are buffered and change state on the rising edge of the clock. Logic Symbol DF12x DSQ C RQ Truth Table SN RN LL LH HL HH HH HH IL = Illegal D X X X L H X C Q QN X IL IL XHL XLH ↑LH ↑HL L NC NC NC = No Change Core Logic HDL Syntax Verilog .................... DF12x inst_name (Q, QN, C, D, RN, SN); VHDL...................... inst_name: DF12x port map (Q, QN, C, D, RN, SN); Pin Loading Pin Name D C SN RN DF121 1.0 1.0 2.1 2.2 Equivalent Loads DF122 DF124 1.0 1.0 1.0 1.0 2.1 2.1 2.2 1.0 DF126 1.0 1.0 2.1 1.