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DL662 - CMOS Gate Array

This page provides the datasheet information for the DL662, a member of the DL661 CMOS Gate Array family.

Description

DL66x is a family of transparent, buffered D latches with active low gate transparency.

RESET and SET are active low.

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Datasheet preview – DL662

Datasheet Details

Part number DL662
Manufacturer AMI
File Size 45.31 KB
Description CMOS Gate Array
Datasheet download datasheet DL662 Datasheet
Additional preview pages of the DL662 datasheet.

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Full PDF Text Transcription

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Core Logic '/[ ® $0,+*  PLFURQ &026 *DWH $UUD Description DL66x is a family of transparent, buffered D latches with active low gate transparency. RESET and SET are active low. Logic Symbol DL66x DSQ G Q R Truth Table SN RN D GN Q QN L L X X IL IL LHXXHL HLXXLH H H X H NC NC HHL L LH HHH L H L IL = Illegal NC = No Change HDL Syntax Verilog .................... DL66x inst_name (Q, QN, D, GN, RN, SN); VHDL...................... inst_name: DL66x port map (Q, QN, D, GN, RN, SN); Pin Loading Pin Name D GN SN RN DL661 1.0 1.0 1.0 1.0 Equivalent Loads DL662 DL664 1.0 1.0 1.0 1.0 1.0 2.1 1.0 1.0 DL666 1.0 1.0 2.1 1.0 Size And Power Characteristics Power Characteristicsa Cell Equivalent Gates Static IDD (TJ = 85°C) (nA) EQLpd (Eq-load) DL661 7.0 TBD 13.
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