DL662 Datasheet | AMI

Description DL66x is a family of transparent, buffered D latches with active low gate transparency. RESET and SET are active low. Logic Symbol DL66x DSQ G Truth Table SN RN D GN Q QN L L X X IL IL LHXXHL HLXXLH H H X H NC NC HHL L LH HHH L H L IL = Illegal NC = No Change HDL Syntax Verilog DL66x inst_name (Q, QN, D, GN, RN, SN); VHDL inst_name: DL66x port map (Q, QN, D, GN, RN, SN); Pin Loading Pin Name D GN SN RN DL661 1.0 1.0 1.0 1.0 Equivalent Loads DL664 1.0 1.0 1.0 1.0 1.0 2.1 1.0 1.0 DL666 1.0 1.0 2.1 1.0 Size And Power Characteristics Power Characteristicsa Cell Equivalent Gates Static IDD (TJ = 85°C) (n A) EQLpd (Eq-load) DL661 DL664 DL666 40.5 a. See page 2-15 for power equation. 3-114...