A64E06161 Description
It is built using AMIC’s high performance CMOS DRAM process. Using hidden refresh technique, the A64E06161 provides a patible asynchronous interface and data can be read in 4-word page mode for fast access times. The A64E06161 has an internal register named the Configuration Register (CR) that controls the operation.
A64E06161 Key Features
- I Available in 48-ball Mini BGA (6X8) package