LP62S1024B-I Overview
The LP62S1024B-I is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a low power voltage: It is built using AMIC's high performance CMOS process. Inputs and three-state outputs are TTL patible and allow for direct interfacing with mon system bus structures.
LP62S1024B-I Key Features
- Power supply range: 2.7V to 3.6V
- Access times: 55/70 ns (max.)
- Current: Very low power version: Operating: 30mA(max.) Standby: 5uA (max.)
- Full static operation, no clock or refreshing required
- All inputs and outputs are directly TTL-patible
- mon I/O using three-state output
- Output enable and two chip enable inputs for easy application
- Data retention voltage: 2V (min.)
- Available in 32-pin SOP, TSOP, TSSOP (8 X 13.4mm) forward type and 36-pin CSP packages