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AT32L021 - 32-bit MCU

Description

9 2 Functionality overview 11 2.1 ARM®Cortex® -M0+ 11 2.2 Hardware divider (HWDIV) 11 2.3 Memory 11 2.3.1 Flash memory11 2.3.2 Memory protection unit (MPU) 11 2.3.3 Embedded SRAM11 2.4 Interrupts 11 2.4.1 Nested vectored interrupt controller (NVIC)11 2.4.2 External interrupts (EXINT) 1

Features

  • Core: ARM® 32-bit Cortex® -M0+ CPU.
  • 80 MHz maximum frequency, with a memory protection unit (MPU), single-cycle multiplication.
  • Hardware divider.
  • Memories.
  • 16 to 64 KB of internal Flash memory.
  • 4 Kbytes of boot memory as a Bootloader, or as a general instruction/data memory (one-time-configurable).
  • sLib: configurable part of main Flash set as a library area with code executable but secured, non-readable.
  • 9 Kbytes of SRAM (8 Kbytes wit.

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Datasheet Details

Part number AT32L021
Manufacturer ARTERY
File Size 2.40 MB
Description 32-bit MCU
Datasheet download datasheet AT32L021 Datasheet

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Full PDF Text Transcription

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AT32L021 Series Datasheet ARM® -based 32-bit Cortex® -M0+ MCU with 16 KB to 64 KB Flash, sLib, 10 timers, 1 ADC, 10 communication interfaces (1 CAN) Features  Core: ARM® 32-bit Cortex® -M0+ CPU − 80 MHz maximum frequency, with a memory protection unit (MPU), single-cycle multiplication  Hardware divider  Memories − 16 to 64 KB of internal Flash memory − 4 Kbytes of boot memory as a Bootloader, or as a general instruction/data memory (one-time-configurable) − sLib: configurable part of main Flash set as a library area with code executable but secured, non-readable − 9 Kbytes of SRAM (8 Kbytes with parity check)  Power control (PWC) − 1.71 to 3.
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