AT79C1020 Datasheet | Atmel

Features - - - - - - - - - - - - - Supports Four 10/100/1000 Mbps Ethernet Ports with GMII/MII Interface IEEE 802.3ab CSMA/CD pliant Full and Half Duplex Mode of Operation Speed and Duplex Mode Auto-negotiation Through MDIO Self-address Learning Mechanism Supports 512-MAC Addresses Automatic Address Aging with 300 seconds Default 512-kbit Packet Buffer Memory Embedded Serial Port Interface Employed to municate with MCU IEEE 802.3ab Flow Control for Full Duplex Operation Supports Store-and-Forward Mode of Operation 0.18 Micron, 1.8V CMOS Technology Packaged in 160-pin PQFP 3.3V I/O Available in a Variety of Packages Depending on Customer Requirements Description This Layer 2 Switch provides an ideal solution for the design of unmanaged full wirespeed multi-port Gigabit Ethernet (Gb E) switches. Each port suppor ts either 10/100/1000 Mbps data rate. Flow controls, back pressure in half-duplex mode and PAUSE frame in full-duplex mode are employed to solve the HOL (Head of Line) blocking. This Layer 2 Switch integrates four half/full duplex mode 1000 BASE Gigabit Ethernet MACs, wire speed switching engines, MAC address based address parsing algorithms and packet buffer memory. 4-port Layer 2 10/100/1000Mbps Unmanaged Switched Ethernet Controller AT79C1020 Summary Figure 1. Ethernet Level 2 Switch Block Diagram Request RXD (RX_CLK) Address FIFO Port Num Ack Address Parse Module Packet In TXD_n G (TX_CLK) Switch Fabric Packet Buffer (48 k Byte) Packet Out Mux Control Signals GMII TXD_G (SYSCLK) Data Rate Management Interface (SPI, MDIO) SPI/MDIO MAC0, 1, 2 & 3 Switch Core 3434BS- NETST- 3/04 Note: This is a summary document. A plete document is available under NDA. For more information, please contact your local Atmel sales office. Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408)...