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Features
• Incorporates the ARM7TDMI® ARM® Thumb® Processor Core
– High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – Embedded ICE (In-circuit Emulation) 256K Bytes of On-chip SRAM (2 Mbits) – 32-bit Data Bus, Single-clock Cycle Access 256K Words 16-bit Flash Memory (4 Mbits) – Single Voltage Read/Write – Sector Erase Architecture – Low-power Operation – Data Polling, Toggle Bit and Ready/Busy End of Program Cycle Detection – Reset Input for Device Initialization – Factory-programmed AT91 Flash Uploader Software Fully Programmable External Bus Interface (EBI) – Up to Eight Chip Selects, Maximum External Address Space of 64M Bytes – Software Programmable 8/16-bit External Data Bus 8-level Priority, Individually Maskable, Vectored Interrup