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Features
• Incorporates the ARM7TDMI™ ARM® Thumb® Processor Core – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – Embedded ICE (In-Circuit Emulation)
• On-chip SRAM and/or ROM – 32-bit Data Bus – Single-clock Cycle Access
• Fully Programmable External Bus Interface (EBI) – Maximum External Address Space of 64M Bytes – Up to 8 Chip Selects – Software Programmable 8/16-bit External Databus
• 8-level Priority, Individually Maskable, Vectored Interrupt Controller – 4 External Interrupts, Including a High-priority Low-latency Interrupt Request
• 32 Programmable I/O Lines • 3-channel 16-bit Timer/Counter
– 3 External Clock Inputs – 2 Multi-purpose I/O Pins per Channel • 2 USARTs – 2 Dedicated Peripheral Data Controller (PDC) Channels per U
AT91R40807 Datasheet
