TS80C51RA2 Description
1.
TS80C51RA2 Key Features
- 80C52 patible
- 8051 pin and instruction patible
- Four 8-bit I/O ports
- Three 16-bit timer/counters
- 256 bytes scratchpad RAM
- High-Speed Architecture
- 40 MHz @ 5V, 30MHz @ 3V
- X2 Speed Improvement capability (6 clocks/machine cycle)
- 60 MHz @ 5V, 40 MHz @ 3V)
- Dual Data Pointer