ProASIC3, the third-generation family of Actel flash FPGAs, offers performance, density, and
Key Features
High Capacity.
15 k to 1 M System Gates.
Up to 144 kbits of True Dual-Port SRAM.
Up to 300 User I/Os
®
Reprogrammable Flash Technology.
130-nm, 7-Layer Metal (6 Copper), Flash-Based CMOS Process Live at Power-Up (LAPU) Level 0 Support Single-Chip Solution Retains Programmed Design when Powered Off
High Performance.
Full PDF Text Transcription for M1A3P1000 (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
M1A3P1000. For precise diagrams, and layout, please refer to the original PDF.
v1.0 www.DataSheet4U.com ProASIC3 Flash Family FPGAs with Optional Soft ARM® Support Features and Benefits High Capacity • 15 k to 1 M System Gates • Up to 144 kbits of T...
View more extracted text
nefits High Capacity • 15 k to 1 M System Gates • Up to 144 kbits of True Dual-Port SRAM • Up to 300 User I/Os ® Reprogrammable Flash Technology • • • • 130-nm, 7-Layer Metal (6 Copper), Flash-Based CMOS Process Live at Power-Up (LAPU) Level 0 Support Single-Chip Solution Retains Programmed Design when Powered Off High Performance • 350 MHz System Performance • 3.3 V, 66 MHz 64-Bit PCI† Clock Conditioning Circuit (CCC) and PLL† • 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation • Bank-Selectable I/O Voltages—up to 4 Banks per Chip • Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V, 3.3 V PCI /