Actel A1020B
the A1020, A1020A, and A1020B devices. The architecture, a combinatorial logic module, is a logic structure that has 8 inputs and 1 output. The logic itself is comprised of a 4-input MUX, as described in Figure 3 on page 6.| Part No. | A1020B |
|---|---|
| Datasheet | A1020B Download |
| Manufacturer |  Actel |
| Description | FPGAs |
| Buy | Stock & Price |
v3.0 RadTolerant FPGAs Fe a t ur es Gener al C har act er is t ics
● 100% Resource Utilization with 100% Pin-Locking
● Secure Programming Technology Prevents Reverse Engineering and Design Theft
● Permanently Programmed for Operation on Power-Up
● Unique In-System Diagnostic and Verification Capability with Silicon Explorer G en er al D e sc r i p t i on
● Tested Total Ionizing Dose (TID) Survivability Level
● No Single Event Latch-up Below a Minimum LET Threshold of 80 MeV-cm2/mg for All RT Devices
● Packages: 84-Pin, 132-Pin, 172-Pin, 196-Pin, and 256-Pin Ceramic Quad Flat Pack
● Offered as Class B and E-Flow (Actel Space Level Flow)
● QML Certified Devices
● 100% Military Temperature Tested (–55°C to +125°C) High D ens it y and P er f or m ance
● 4,000 to 20,000 Logic Equivalent Gates
● 2,000 to 10,000 ASIC Equivalent Gates
● Up to 85 MHz Internal Performance
● Up to 60 MHz System Performance
● Up to 228 User I/Os
● Up to Four Fast, Low-Skew Clock Networks E asy L ogic I nt eg rat i...
● 100% Resource Utilization with 100% Pin-Locking
● Secure Programming Technology Prevents Reverse Engineering and Design Theft
● Permanently Programmed for Operation on Power-Up
● Unique In-System Diagnostic and Verification Capability with Silicon Explorer G en er al D e sc r i p t i on
● Tested Total Ionizing Dose (TID) Survivability Level
● No Single Event Latch-up Below a Minimum LET Threshold of 80 MeV-cm2/mg for All RT Devices
● Packages: 84-Pin, 132-Pin, 172-Pin, 196-Pin, and 256-Pin Ceramic Quad Flat Pack
● Offered as Class B and E-Flow (Actel Space Level Flow)
● QML Certified Devices
● 100% Military Temperature Tested (–55°C to +125°C) High D ens it y and P er f or m ance
● 4,000 to 20,000 Logic Equivalent Gates
● 2,000 to 10,000 ASIC Equivalent Gates
● Up to 85 MHz Internal Performance
● Up to 60 MHz System Performance
● Up to 228 User I/Os
● Up to Four Fast, Low-Skew Clock Networks E asy L ogic I nt eg rat i...
