Datasheet Summary
.. v3.0
RadTolerant FPGAs
Fe a t ur es
Gener al C har act er is t ics
- 100% Resource Utilization with 100% Pin-Locking
- Secure Programming Technology Prevents Reverse Engineering and Design Theft
- Permanently Programmed for Operation on Power-Up
- Unique In-System Diagnostic and Verification Capability with Silicon Explorer
G en er al D e sc r i p t i on
- Tested Total Ionizing Dose (TID) Survivability Level
- No Single Event Latch-up Below a Minimum LET Threshold of 80 MeV-cm2/mg for All RT Devices
- Packages: 84-Pin, 132-Pin, 172-Pin, 196-Pin, and 256-Pin Ceramic Quad Flat Pack
- Offered as Class B and E-Flow (Actel Space Level Flow)
- QML Certified Devices
- 100%...
