AS4C1M16S Overview
CLK is driven by the system clock. All SDRAM input signals are sampled on the positive.
AS4C1M16S Key Features
- Fast access time: 5.4ns Fast clock rate: 143 MHz Self refresh mode: standard Internal pipelined architecture 512K word x
- CAS Latency: 2, or 3
- Burst Length: 1, 2, 4, 8, or full page
- Burst Type: Sequential or Interleaved
- Burst stop function Individual byte controlled by LDQM and UDQM Auto Refresh and Self Refresh 4096 refresh cycles/64ms C
