AS7C33256NTD18B
Overview
- Organization: 262,144 words × 18 bits
- NTD™ architecture for efficient bus operation
- Fast clock speeds to 200 MHz
- Fast clock to data access: 3.0/3.5/4.0 ns
- Fast OE access time: 3.0/3.5/4.0 ns
- Fully synchronous operation
- Asynchronous output enable control
- Available in 100-pin TQFP package
- Byte write enables
- Clock enable for operation hold Logic block diagram A[17:0] 18 D
