AS7C33512FT32A Datasheet | Alliance Semiconductor Corporation

Features - - - - - - - - Organization: 524,288 words × 32 or 36 bits Fast clock to data access: 7.5/8.5/10 ns Fast OE access time: 3.5/4.0 ns Fully synchronous flow-through operation Asynchronous output enable control Available in 100-pin TQFP packages Individual byte write and global write Multiple chip enables for easy expansion - - - - - 3.3V core power supply 2.5V or 3.3V I/O operation with separate VDDQ Linear or interleaved burst control Snooze mode for reduced power-standby mon data inputs and data outputs .. Logic block diagram LBO CLK ADV ADSC ADSP A[18:0] 19 Q0 Burst logic Q1 19 D Q CE Address register CLK D DQd Q Byte write registers CLK D DQ Q c Byte write registers CLK D DQb Q Byte write registers CLK D DQa Q Byte write registers CLK D Enable CE register CLK Power down D Enable Q delay register CLK 36/32 DQ[a:d] Q 4 CLK CE CLR 512K × 32/36 Memory array GWE BWE BWd 36/32 36/32 BWc BWb BWa CE0 CE1 CE2 OE Output buffer Input registers CLK Selection guide Minimum cycle time Maximum clock access time Maximum operating current Maximum standby current Maximum CMOS standby current (DC) -75 8.5 7.5 275 90 60 -85 10 8.5 250 80 60 -10 12 10 230 80 60 Units ns ns m A m A m A 12/23/04, v 1.4 Alliance Semiconductor 1 of 19 Copyright © Alliance Semiconductor. All rights reserved. AS7C33512FT32A AS7C33512FT36A ® 16 Mb Synchronous SRAM products list1,2 Org 1MX18 512KX32 512KX36 1MX18 512KX32 512KX36 1MX18 .. 512KX32 512KX36 1MX18 512KX32 512KX36 1MX18 512KX32 512KX36 Part Number AS7C331MPFS18A AS7C33512PFS32A AS7C33512PFS36A AS7C331MPFD18A AS7C33512PFD32A AS7C33512PFD36A AS7C331MFT18A AS7C33512FT32A AS7C33512FT36A AS7C331MNTD18A AS7C33512NTD32A AS7C33512NTD36A AS7C331MNTF18A AS7C33512NTF32A AS7C33512NTF36A Mode PL-SCD PL-SCD PL-SCD PL-DCD PL-DCD PL-DCD FT FT FT NTD-PL NTD-PL NTD-PL NTD-FT NTD-FT NTD-FT Speed 166/133 MHz 166/133 MHz 166/133 MHz 166/133 MHz 166/133 MHz 166/133 MHz 7.5/8.5/10 ns 7.5/8.5/10 ns 7.5/8.5/10 ns 166/133 MHz...