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ASM5P23S05A - (ASM5P23S05A / ASM5P23S09A) 3.3V SpreadTrak Zero Delay Buffer

Datasheet Summary

Description

ASM5P23S09A is a versatile, 3.3V zero-delay buffer designed to distribute high-speed clocks with Spread Spectrum capability.

It is available in a 16-pin package.

The ASM5P23S05A is the eight-pin version of the ASM5P23S09A.

Features

  • 15 MHz to 133 MHz operating range, compatible with CPU and PCI bus frequencies. Zero input - output propagation delay. Multiple low-skew outputs. Output-output skew less than 250 pS. Device-device skew less than 700 pS. One input drives 9 outputs, grouped as 4+4+1 (ASM5P23S09A). One input drives 5 outputs (ASM5P23S05A). Less than 200 pS cycle-to-cycle jitter is compatible with Pentium based systems. Test Mode to bypass PLL (ASM5P23S09A only, refer Select Input Decoding Table). Available in 16-pi.

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Datasheet preview – ASM5P23S05A

Datasheet Details

Part number ASM5P23S05A
Manufacturer Alliance Semiconductor Corporation
File Size 427.87 KB
Description (ASM5P23S05A / ASM5P23S09A) 3.3V SpreadTrak Zero Delay Buffer
Datasheet download datasheet ASM5P23S05A Datasheet
Additional preview pages of the ASM5P23S05A datasheet.

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Full PDF Text Transcription

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November 2004 www.DataSheet4U.com ASM5P23S09A ASM5P23S05A 3.3V ‘SpreadTrak’ Zero Delay Buffer rev 1.3 General Features 15 MHz to 133 MHz operating range, compatible with CPU and PCI bus frequencies. Zero input - output propagation delay. Multiple low-skew outputs. Output-output skew less than 250 pS. Device-device skew less than 700 pS. One input drives 9 outputs, grouped as 4+4+1 (ASM5P23S09A). One input drives 5 outputs (ASM5P23S05A). Less than 200 pS cycle-to-cycle jitter is compatible with Pentium based systems. Test Mode to bypass PLL (ASM5P23S09A only, refer Select Input Decoding Table). Available in 16-pin, 150-mil SOIC and 4.4 mm TSSOP packages for ASM5P23S09A and in 8-pin, 150-mil SOIC and 4.4 mm TSSOP packages for ASM5P23S05A. 3.3V operation Advanced 0.35< CMOS technology.
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