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AS4C32M16D1 Datasheet 32m X 16 Bit Ddr Synchronous Dram

Manufacturer: Alliance Semiconductor

Overview: AS4C32M16D1 Revision History AS4C32M16D1 - 60-Ball, 8x13x1.2 mm (max) TFBGA PACKAGE Revision Details Rev 1.0 Preliminary datasheet Date August 2014 Confidential 1 Rev. 1.0 Aug. /2014 AS4C32M16D1 32M x 16 bit DDR Synchronous DRAM (SDRAM) TFBGA option - Advanced (Rev. 1.0, Aug.

Key Features

  • Fast clock rate: 200MHz.
  • Differential Clock CK & CK.
  • Bi-directional DQS.
  • DLL enable/disable by EMRS.
  • Fully synchronous operation.
  • Internal pipeline architecture.
  • Four internal banks, 8M x 16-bit for each bank.
  • Programmable Mode and Extended Mode registers - CAS Latency: 2, 2.5, 3 - Burst length: 2, 4, 8 - Burst Type: Sequential & Interleaved.
  • Individual bytes write mask control.
  • DM Write Latency = 0.
  • Auto Refresh and Self Refresh.
  • 8192.

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