Datasheet Summary
512M (32M x 16) bit Synchronous DRAM (SDRAM)
Confidential
Preliminary (Rev. 1.0, July /2014)
Revision History AS4C32M16SM
Revision Details Rev 1.0 Preliminary datasheet
Date July 2014
Confidential
1|P a g e
Rev1.0, July 2014
Confidential
512M (32M x 16) bit Synchronous DRAM (SDRAM)
Preliminary (Rev. 1.0, July /2014)
Features
- PC133-pliant
- Configurations
- 32 Meg x 16 (8 Meg x 16 x 4 banks)
- Fully synchronous; all signals registered on positive edge of system clock
- Internal, pipelined operation; column address can be changed every clock cycle
- Internal banks for hiding row access/precharge
- Programmable burst lengths: 1, 2, 4, 8, or full page
-...