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AS4C4M16D1A - DDR

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Alliance Semiconductor

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AS4C4M16D1A DDR by Alliance Semiconductor - Datasheet Preview — Datasheet preview – AS4C4M16D1A

Datasheet Details

Part number	AS4C4M16D1A
Manufacturer	Alliance Semiconductor
File Size	1.82 MB
Description	DDR
Datasheet	AS4C4M16D1A Datasheet
Additional preview pages of the AS4C4M16D1A datasheet.

AS4C4M16D1A Product details

Description

Table 2.

Differential Clock: CK and CK are differential clock inputs.

edge of CK .

Features

Overview.
Fast clock rate: 200 MHz.
Differential Clock CK & CK.
Bi-directional DQS.
DLL enable/disable by EMRS.
Fully synchronous operation.
Internal pipeline architecture.
Four internal banks, 1M x 16-bit for each bank.
Programmable Mode and Extended Mode Registers - CAS Latency: 2, 2.5, 3 - Burst length: 2, 4, 8 - Burst Type: Sequential & Interleaved.
Individual byte writes mask control.
DM Write Latenc.

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Published: Oct 13, 2019 |