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AS4C4M16SA - 64M Synchronous DRAM

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Alliance Semiconductor

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AS4C4M16SA 64M Synchronous DRAM by Alliance Semiconductor - Datasheet Preview — Datasheet preview – AS4C4M16SA

Datasheet Details

Part number	AS4C4M16SA
Manufacturer	Alliance Semiconductor
File Size	1.66 MB
Description	64M Synchronous DRAM
Datasheet	AS4C4M16SA Datasheet
Additional preview pages of the AS4C4M16SA datasheet.

AS4C4M16SA Product details

Description

Table 3.

Clock: CLK is driven by the system clock.

All SDRAM input signals are sampled on the positive edge of CLK.

Features

Fast access time from clock: 5.4 ns.
Fast clock rate: 166 MHz.
Fully synchronous operation.
AEC-Q100 Compliant.
Internal pipelined architecture.
1M word x 16-bit x 4-bank.
Programmable Mode registers - CAS Latency: 2 or 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type: Sequential or Interleaved - Burst stop function - Optional drive strength control.
Auto Refresh and Self Refresh.
4096 refresh cycles/32ms.
Automotive Ambient Temperature:.

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Published: Nov 2, 2016 |