Datasheet Details
| Part number | AS4C4M16S |
|---|---|
| Manufacturer | Alliance Semiconductor |
| File Size | 3.23 MB |
| Description | 64Mb / 4M x 16 bit Synchronous DRAM |
| Datasheet |
 AS4C4M16S Datasheet
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General Description
Table 3.
Symbol CLK Type Input Description Clock: CLK is driven by the system clock.
All SDRAM input signals are sample on the positive edge of CLK.
Key Features
- Fast access time from clock: 5.4/5.4 ns Fast clock rate: 166/143 MHz Fully synchronous operation Internal pipelined architecture 1M word x 16-bit x 4-bank Programmable Mode registers - CAS Latency: 2, or 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type: interleaved or linear burst - Burst stop function Auto Refresh and Self Refresh 4096 refresh cycles/64ms CKE power down mode Single +3.3V ± 0.3V power supply Interface: LVTTL 54-p.