AS4C512M16D3LB Datasheet PDF (8Gbit DDR3L) | Download Alliance Semiconductor AS4C512M16D3LB

AS4C512M16D3LB - 8Gbit DDR3L

Features

JEDEC Standard Compliant.
Power supplies: VDD & VDDQ = +1.35V.
Backward compatible to VDD & VDDQ = +1.5V ±0.075V.
Operating temperature: Commercial: TC = 0~95°C Industrial: TC = -40~95°C.
Supports JEDEC clock jitter specification.
Fully synchronous operation.
Fast clock rate: 800MHz.
Differential Clock, CK & CK#.
Bidirectional differential data strobe - DQS & DQS#.
8 internal banks for concurrent operation.
8n-bit prefetch architecture.

Datasheet Details

Part number	AS4C512M16D3LB
Manufacturer	Alliance Semiconductor
File Size	2.17 MB
Description	8Gbit DDR3L
Datasheet	AS4C512M16D3LB Datasheet
Additional preview pages of the AS4C512M16D3LB datasheet.

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Full PDF Text Transcription

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AS4C512M16D3LB Revision History 8Gbit DDR3L AS4C512M16D3LB 8 BANKS X 64Mbit X 16 Dual Die Package (DDP) 96ball FBGA Package Revision Details Rev 1.0 Preliminary datasheet Date May 2019 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential - 1 of 86 - Rev.1.0 May 2019 AS4C512M16D3LB 512M x 16 bit DDR3L Synchronous DRAM (SDRAM) Features  JEDEC Standard Compliant  Power supplies: VDD & VDDQ = +1.35V  Backward compatible to VDD & VDDQ = +1.5V ±0.

Published: Aug 7, 2019 |