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AS7C1026B Datasheet 5v 64k X 16 CMOS Sram

Manufacturer: Alliance Semiconductor

Overview: March 2004 ® AS7C1026B 5 V 64K X 16 CMOS SRAM.

General Description

The AS7C1026B is a high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) device organized as 65,536 words × 16 bits.

It is designed for memory applications where fast data access, low power, and simple interfacing are desired.

Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 5, 6, 7, 8 ns are ideal for high-performance applications.

Key Features

  • Industrial and commercial versions.
  • Organization: 65,536 words × 16 bits.
  • Center power and ground pins for low noise.
  • High speed - 10/12/15/20 ns address access time - 5, 6, 7, 8 ns output enable access time.
  • Low power consumption: ACTIVE - 605 mW / max @ 10 ns.
  • TTL-compatible, three-state I/O.
  • JEDEC standard packaging.
  • ESD protection ≥ 2000 volts.
  • Latch-up current ≥ 200 mA - 44-pin 400 mil SOJ - 44-pin TSOP 2-400.

AS7C1026B Distributor