AS7C1026B Description
The AS7C1026B is a high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) device organized as 65,536 words × 16 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired. Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 5, 6, 7, 8 ns are ideal for high-performance applications.
AS7C1026B Key Features
- Industrial and mercial versions
- Organization: 65,536 words × 16 bits
- Center power and ground pins for low noise
- High speed
- 10/12/15/20 ns address access time
- 5, 6, 7, 8 ns output enable access time
- Low power consumption: ACTIVE
- 605 mW / max @ 10 ns
- TTL-patible, three-state I/O
- JEDEC standard packaging