AS7C1026C Description
A write cycle is acplished by asserting write enable (WE) and chip enable (CE). Data on the input pins I/O0 through I/O15 is written on the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).
AS7C1026C Key Features
- JEDEC standard packaging
- ESD protection > _ 2000 volts
- 44-pin 400 mil SOJ
- 44-pin TSOP 2-400