Datasheet Details
| Part number | AS8C801800 |
|---|---|
| Manufacturer | Alliance Semiconductor |
| File Size | 8.09 MB |
| Description | 3.3V Synchronous SRAMs |
| Datasheet |
 AS8C801800 Datasheet
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General Description
256K x 36 / 512K x 18.
The SRAMs contain write, data, address and control registers.
Internal logic allows the SRAM to generate a self-timed write based upon a decision which can be left until the end of the write cycle.
Key Features
- 256K x 36, 512K x 18 memory configurations Supports high system speed:.
- 150MHz 3.8ns clock access time.
- LBO input selects interleaved or linear burst mode Self-timed write cycle with global write control (GW), byte write enable (BWE), and byte writes (BWx) 3.3V core power supply Power down controlled by ZZ input 3.3V I/O supply (VDDQ) Packaged in a JEDEC Standard 100-pin thin plastic quad flatpack (TQFP).