AD4130-8 Overview
Data Sheet AD4130-8 32 μA, Ultra Low Power, 24-Bit Sigma-Delta ADC with Integrated PGA and FIFO.
AD4130-8 Key Features
- Ultralow current consumption (typical)
- 32 µA: continuous conversion mode (gain = 128)
- 5 µA: duty cycling mode (ratio = 1/16)
- 0.5 µA: standby mode
- 0.1 µA: power-down mode
- Built-in features for system level power savings
- Current saving duty cycle ratio: 1/4 or 1/16
- Smart sequencer and per channel configuration minimizes host processor load
- Deep embedded FIFO minimizes host processor load (depth of 256 samples)
- Autonomous FIFO interrupt functionality, threshold detection