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AD6655 - IF Diversity Receiver

General Description

4 Specifications 5 ADC DC Specifications AD6655BCPZ-80/ AD6655BCPZ-105 5 ADC DC Specifications AD6655BCPZ-125/ AD6655BCPZ-150 6 ADC AC Specifications AD6655BCPZ-80/ AD6655BCPZ-105 7 ADC AC Specifications AD6655BCPZ-125/ AD6655BCPZ-150 8 Digital Specifications

Key Features

  • SNR = 74.5 dBc (75.5 dBFS) in a 32.7 MHz BW at 70 MHz @ 150 MSPS SFDR = 80 dBc to 70 MHz @ 150 MSPS 1.8 V analog supply operation 1.8 V to 3.3 V CMOS output supply or 1.8 V LVDS output supply Integer 1-to-8 input clock divider Integrated dual-channel ADC Sample rates up to 150 MSPS IF sampling frequencies to 450 MHz Internal ADC voltage reference Integrated ADC sample-and-hold inputs Flexible analog input range: 1 V p-p to 2 V p-p ADC clock duty cycle stabilizer 95 dB channel isolation/crosstalk.

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Other Datasheets by Analog Devices

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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IF Diversity Receiver AD6655 FEATURES SNR = 74.5 dBc (75.5 dBFS) in a 32.7 MHz BW at 70 MHz @ 150 MSPS SFDR = 80 dBc to 70 MHz @ 150 MSPS 1.8 V analog supply operation 1.8 V to 3.3 V CMOS output supply or 1.