Analog Devices AD9530
Low Jitter Clock Generator
| Part No. | AD9530 |
|---|---|
| Datasheet | AD9530 Download |
| Manufacturer |  Analog Devices |
| Description | Low Jitter Clock Generator |
| Buy | Stock & Price |
FEATURES
Fully integrated, ultralow noise phase-locked loop (PLL) 4 differential, 2.7 GHz common-mode logic (CML) outputs 2 differential reference inputs with programmable internal termination options <232 fs rms absolute jitter (12 kHz to 20 MHz) with a non- ideal reference and 8 kHz loop bandwidth <100 fs rms absolute jitter (12 kHz to 20 MHz) with an 80 kHz loop bandwidth and low jitter input reference clock Supports low loop bandwidths for jitter attenuation Manual switchover Single 2.5 V typical supply voltage 48-lead, 7 mm × 7 mm LFCSPAPPLICATIONS
40 Gbps/100 Gbps optical transport network (OTN) line side clocking Clocking of high speed analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) Data communicationsGENERAL DESCRIPTION
The AD9530 is a fully integrated PLL and distribution supporting, clock cleanup, and frequency translation device for 40 Gbps/ 100 Gbps OT
