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AD9531 Datasheet 3-Channel Clock Generator

Manufacturer: Analog Devices

Overview: Data Sheet 3-Channel Clock Generator, 24 Outputs AD9531.

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General Description

The AD9531 provides a multioutput clock generator function and three on-chip phase-locked loop (PLL) cores with SPI programmable output frequencies and formats.

PLL1 provides two reference inputs and 10 outputs and includes four user selectable loop configurations.

The PLL has a fully integrated loop filter requiring on

Key Features

  • 3 fully integrated PLL/VCO cores (PLL1, PLL2, and PLL3) Jitter performance: 0.462 ps rms typical PLL1, fractional-N mode, 12 kHz to 20 MHz bandwidth Loss of reference and lock detection for each PLL Pin-configurable common frequency translations Automatic synchronization of all outputs on power-up Manual output synchronization capability Package available in an 88-lead LFCSP PLL1 details Fractional-N/integer-N modes Optional external VCXO Fixed delay mode for constant static phase offset 2 refer.

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