AD9548 Overview
The AD9548 provides synchronization for many systems, including synchronous optical networks (SONET/SDH). The AD9548 generates an output clock synchronized to one of up to four differential or eight single-ended external input references. The digital PLL allows for reduction of input time jitter or phase noise associated with the external references.
AD9548 Key Features
- Supports Stratum 2 stability in holdover mode
- Supports reference switchover with phase build-out
- Supports hitless reference switchover
- Auto/manual holdover and reference switchover
- 4 pairs of reference input pins with each pair configurable as a
- Input reference frequencies from 1 Hz to 750 MHz
- Reference validation and frequency monitoring (1 ppm)
- Programmable input reference switchover priority
- 30-bit programmable input reference divider
- 4 pairs of clock output pins with each pair configurable as a