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Data Sheet AD9684
14-Bit, 500 MSPS LVDS, Dual Analog-to-Digital Converter
FEATURES
► Parallel LVDS (DDR) outputs ► 1.1 W total power per channel at 500 MSPS (default settings) ► SFDR = 85 dBFS at 170 MHz fIN (500 MSPS) ► SNR = 68.6 dBFS at 170 MHz fIN (500 MSPS) ► ENOB = 10.9 bits at 170 MHz fIN ► DNL = ±0.5 LSB ► INL = ±2.5 LSB ► Noise density = −153 dBFS/Hz at 500 MSPS ► 1.25 V, 2.50 V, and 3.3 V supply operation ► No missing codes ► Internal analog-to-digital converter (ADC) voltage reference ► Flexible input range and termination impedance
► 1.46 V p-p to 2.06 V p-p (2.