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AD9694S-CSL - Quad Analog-to-Digital Converter

General Description

Product Highlights 3 Specifications 4 DC Specifications 4 AC Specifications 5 Digital Specifications 8 Switching Specifications9 REVISION HISTORY 6/2023 Revision 0: Initial Version AD9694S-CSL Timing Specifications 10 Radiation Test and Limit Specifications 11 Absolute Maximum Ratings12 Th

Key Features

  • 14-Bit, 500 MSPS, JESD204B, Quad Analog-to-Digital Converter.
  • Flexible JESD204B lane configurations.
  • JESD204B (Subclass 1) coded serial digital outputs.
  • Lane rates up to 15 Gbps.
  • 1.66 W total power at 500 MSPS.
  • 415 mW per ADC channel.
  • SFDR = 82 dBFS at 305 MHz (1.80 V p-p input range).
  • SNR = 66.8 dBFS at 305 MHz (1.80 V p-p input range).
  • Noise density =.
  • 151.5 dBFS/Hz (1.80 V p-p input range).
  • 0.975 V, 1.8 V, and 2.5 V dc supply operation.

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Full PDF Text Transcription for AD9694S-CSL (Reference)

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Data Sheet AD9694S-CSL Commercial Space Product FEATURES 14-Bit, 500 MSPS, JESD204B, Quad Analog-to-Digital Converter ► Flexible JESD204B lane configurations ► JESD204B (...

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Digital Converter ► Flexible JESD204B lane configurations ► JESD204B (Subclass 1) coded serial digital outputs ► Lane rates up to 15 Gbps ► 1.66 W total power at 500 MSPS ► 415 mW per ADC channel ► SFDR = 82 dBFS at 305 MHz (1.80 V p-p input range) ► SNR = 66.8 dBFS at 305 MHz (1.80 V p-p input range) ► Noise density = −151.5 dBFS/Hz (1.80 V p-p input range) ► 0.975 V, 1.8 V, and 2.5 V dc supply operation ► No missing codes ► Internal ADC voltage reference ► Analog input buffer ► On-chip dithering to improve small signal linearity ► Flexible differential input voltage range ► 1.44 V p-p to 2.16 V p-p (1.80 V p-p nominal) ►