AD9854 - CMOS 300MSPS Quadrature Complete DDS

4 Specifications 5 Absolute Maximum Ratings 8 Explanation of Test Levels 8 ESD Caution 8 Pin Configuration and Function Descriptions 9 Typical Performance Characteristics 12 Typical Applications 16 Theory of Operation 19 Modes of Operation 19 Using the AD9854 29 Internal and External Update C

• 300 MHz internal clock rate FSK, BPSK, PSK, chirp, AM operation Dual integrated 12-bit digital-to-analog converters (DACs) Ultrahigh speed comparator, 3 ps rms jitter Excellent dynamic performance 80 dB SFDR at 100 MHz (±1 MHz) AOUT 4× to 20× programmable reference clock multiplier Dual 48-bit programmable frequency registers Dual 14-bit programmable phase offset registers 12-bit programmable amplitude modulation and on/off output shaped keying function Single-pin FSK and BPSK data interfaces PS.