ADRF5731 Datasheet | Analog Devices

Data Sheet 2 d B LSB, 4-Bit, Silicon Digital Attenuator, 100 MHz to 40 GHz ADRF5731 Features Ultrawideband frequency range: 100 MHz to 40 GHz Attenuation range: 2 d B steps to 30 d B Low insertion loss 1.7 d B to 18 GHz 2.2 d B to 26 GHz 3.5 d B to 40 GHz Attenuation accuracy ±(0.1 + 2.0%) of attenuation state up to 18 GHz ±(0.2 + 2.5%) of attenuation state up to 26 GHz ±(0.5 + 10.0%) of attenuation state up to 40 GHz Typical step error ±0.15 d B to 18 GHz ±0.20 d B to 26 GHz ±0.60 d B to 40 GHz High input linearity P0.1d B insertion loss state: 30 d Bm P0.1d B other attenuation states: 26 d Bm IP3: 50 d Bm typical High RF input power handling: 26 d Bm average, 30 d Bm peak Tight distribution in relative phase No low frequency spurious signals SPI and parallel mode control, CMOS/LVTTL patible RF amplitude settling time (0.1 d B of final RF output): 230 ns 2.5 mm × 2.5 mm, 16-terminal LGA package Pin patible with ADRF5721, low frequency cutoff version APPLICATIONS Industrial scanners Test and instrumentation Cellular infrastructure: 5G millimeter wave Military radios, radars, electronic counter measures (ECMs) Microwave radios and very small aperture terminals (VSATs) GENERAL DESCRIPTION The ADRF5731 is a silicon, 4-bit digital attenuator with a 30 d B attenuation control range in 2 d B steps. This device operates from 100 MHz to 40 GHz with better than 3.5 d B of insertion loss. The ATTIN port of the ADRF5720 has a radio frequency (RF) input power handling capability of 26 d Bm average and 30 d Bm peak for all states. The ADRF5731 requires a dual supply voltage of +3.3 V and - 3.3 V. The device Features serial peripheral interface (SPI), parallel mode control, and plementary metal-oxide semiconductor (CMOS)-/low voltage transistor to transistor logic (LVTTL) patible controls. FUNCTIONAL BLOCK DIAGRAM D3/SEROUT D2 PS LE 16 15 14 13 D4/SERIN 1 D5/CLK 2 GND 3 ATTIN 4 SERIAL/ PARALLEL INTERFACE 4-BIT DIGITAL ATTENUATOR 12 VDD 11 VSS 10 GND 9...