Datasheet Details
| Part number | ADSP-2196 |
|---|---|
| Manufacturer | Analog Devices |
| File Size | 1.97 MB |
| Description | DSP Microcomputer |
| Datasheet |
 ADSP-2196 Datasheet
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Description
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4 DSP Peripherals Architecture 5 Memory Architecture.
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Features
- 6.25 ns Instruction Cycle Time (Internal), for up to 160 MIPS Sustained Performance ADSP-218x Family Code Compatible with the Same Easy -to-Use Algebraic Syntax Single-Cycle Instruction Execution Up to 16M words of Addressable Memory Space with 24 Bits of Addressing Width Dual Purpose Program Memory for Both Instruction and Data Storage Fully Transparent Instruction Cache Allows Dual Operand Fetches in Every Instruction Cycle Unified Memory Space Permits Flexible Address Generation, Using Two In.