AS4SD4M16 Description
The 64Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 67,108,864 bits. It is internally configured as a quad-bank DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the x16’s 6,777,216-bit banks is organized as 4,096 rows by 256 columns by 16 bits.
AS4SD4M16 Key Features
- OCPL- 54-pin TSOP (400 mil) DG Timing (Cycle Time) 8ns; tAC = 6.5ns @ CL = 3 ( tRP
- 24ns) 10ns; tAC = 9ns @ CL = 2 Operating Temperature Ranges -Military (-55°C to +125° C) -Industrial Temp (-40°C to 85°
- 6.5ns 100 MHz
- 7ns 83 MHz 9ns
- 66 MHz 9ns
- Off-center parting line --CL = CAS (READ) latency