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BCM81356 - PAM-4 Duplex PHY

General Description

5 1.1 Device Functions 6 1.2 High-Speed Line-Side Interfaces 7 1.2.1 Peaking Filter and VGA 7 1.2.2 Analog-to-Digital Converter (ADC)/Equalizer/Timing Recovery7 1.3 High-Speed Host-Side Interfaces 7 1.3.1 Peaking Filter and VGA 7 1.3.2 Decision Feedback Equalizer (DFE)/Timing Recovery 7 1.4 Adaptiv

Key Features

  • Host-side interface:.
  • Long reach (LR): ~30 dB.
  • High-performance analog SerDes.
  • Line-side interface:.
  • KR: >30 dB.
  • CR: >30 dB.
  • Chip-to-module (C2M).
  • High-performance DSP SerDes.
  • Retimer, Forward, and Reverse Gearbox modes.
  • Flexible crossbar.
  • Supports forward error correction (FEC).
  • Supports Mux and Broadcasting modes.
  • supports 400G-CR8 mode.
  • Integrated AC-coupling capacitors at host-side and line-side re.

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Other Datasheets by Broadcom

Part Number Description
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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BCM81356 16-nm 16 x 56 Gb/s PAM-4 Duplex PHY Data Sheet Overview The Broadcom® BCM81356 is a single-chip 16 × 56 Gb/s full-duplex PHY. It supports both the PAM-4 and NRZ data formats. It supports various operation modes, such as Retimer, Forward, and Reverse Gearbox modes. It also supports 10G, 25G, 40G, 50G, 100G, 200G, and 400G linecard applications. On-chip clock synthesis is performed by a low-cost reference clock through high-frequency, low-jitter phaselocked loops (PLLs). The BCM81356 is fabricated in advanced low-power 16-nm CMOS technology. The BCM81356 is available in a 23 mm × 23 mm, 0.8-mm pitch, 729-ball BGA, RoHS-compliant package.