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CEFF634
Nov. 2002
N-Channel Logic Level Enhancement Mode Field Effect Transistor
FEATURES
250V , 6A , RDS(ON)=450mΩ @VGS=10V.
D
6
Super high dense cell design for extremely low RDS(ON).
High power and current handling capability.
TO-220F full-pak for through hole
G
G
D S
S
TO-220F
ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted)
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
Drain Current-Continuous
ID
-Pulsed
IDM
Drain-Source Diode Forward Current
IS
Maximum Power Dissipation @Tc=25 C Derate above 25 C
Operating and Storage Temperautre Range
PD TJ, TSTG
Limit 250 30 6 24 6 38 0.3 -50 to 150
Unit V V A A A W W/ C C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case
R JC
3.