Download CS2300-01 Datasheet PDF
CS2300-01 page 2
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CS2300-01 Description

The CS2300-01 is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-01 is based on a hybrid analog-digital PLL architecture prised of a unique bination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital PLL. This architecture allows for generation of a low-jitter clock relative to an external noisy synchronization clock with frequencies as low as 750...

CS2300-01 Key Features

  • Generates a Low Jitter 6
  • 75 MHz Clock from a Jittery 750 kHz to 30 MHz Clock Source
  • 1x, 2x, 4x, and 8x  Output Enable Pin  Lock Indicator  Minimal Board Space Required
  • No External Analog Loop-filter ponents
  • The PLL clock output is forced to 0 when the PLL is unl