CS2300-01 Overview
High Impedance 0.1 µF N CLK_IN Output to Input Clock Ratio 1 Hz BW Digital PLL & Fractional N Logic LOCK PLL Lock Indicator CLK_OUT 6 MHz to 75 MHz PLL Output OUT_EN Output Enable/Disable VD GND 0.1 µF 1 µF 3.3 V Advance Product Information Please see the CS2300-OTP datasheet for package information, device characteristics, and specifications except where noted due to specific programming options. 3. OPERATIONAL INFORMATION plete operational information can be found in the CS2300-OTP datasheet. Specific operational details dictated by the programming of the CS2300-01 are included below. • The PLL clock output is forced to 0 when the PLL is unl
CS2300-01 Key Features
- Generates a Low Jitter 6
- 75 MHz Clock from a Jittery 750 kHz to 30 MHz Clock Source
- 1x, 2x, 4x, and 8x Output Enable Pin Lock Indicator Minimal Board Space Required
- No External Analog Loop-filter ponents
- The PLL clock output is forced to 0 when the PLL is unl