CS2300-OTP Datasheet | Cirrus Logic

Features  Clock Multiplier / Jitter Reduction - Generates a Low Jitter 6 - 75 MHz Clock from a Jittery 50 Hz to 30 MHz Clock Source  Internal LCO Reference Clock  Highly Accurate PLL Multiplication Factor - Maximum Error Less Than 1 PPM in High Resolution Mode  One-Time Programmability - Configurable Hardware Control Pins - Configurable Auxiliary Output  Minimal Board Space Required - No External Analog Loop-filter ponents General Description The CS2300-OTP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-OTP is based on a hybrid analogdigital PLL architecture prised of a unique bination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital PLL. This architecture allows for generation of a low-jitter clock relative to an external noisy synchronization clock with frequencies as low as 50 Hz. The CS2300-OTP has many...