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CY2PP3210 Datasheet

Dual 1:5 Differential Clock / Data Fanout Buffer

Manufacturer: Cypress (now Infineon)

CY2PP3210 Overview

The CY2PP3210 is a low-skew, low propagation delay dual 1-to-5 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The device is implemented on SiGe technology and has a fully differential internal architecture that is optimized to achieve low signal skews at operating frequencies of up to 1.5 GHz.

CY2PP3210 Key Features

  • Dual sets of five ECL/PECL differential outputs
  • Two ECL/PECL differential inputs
  • Hot-swappable/-insertable
  • 50 ps output-to-output skew
  • 150 ps device-to-device skew
  • 500 ps propagation delay (typical)
  • 0.8 ps RMS period jitter (max.)
  • 1.5 GHz Operation (2.2 GHz max. toggle frequency)
  • PECL mode supply range: VCC = 2.5V± 5% to 3.3V±5% with VEE = 0V
  • ECL mode supply range: VE E = -2.5V± 5% to -3.3V±5% with VCC = 0V

More Datasheets from Cypress (now Infineon)

See all Cypress (now Infineon) datasheets

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CY2PP3210 Distributor