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CY7B994V - High-Speed Multi-Phase PLL Clock Buffer

General Description

The CY7B993V and CY7B994V High-Speed Multi-Phase PLL Clock Buffers offer user-selectable control over system clock functions.

This multiple-output clock driver provides the system integrator with functions necessary to optimize the timing of high-performance computer and communication systems.

Key Features

  • 12/100-MHz (CY7B993V), or 24/185-MHz (CY7B994V) output operation.
  • Matched pair outputs skew.

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Full PDF Text Transcription for CY7B994V (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for CY7B994V. For precise diagrams, and layout, please refer to the original PDF.

RoboClock,,™ CY7B994V CY7B993V PRELIMINARY High-Speed Multi-Phase PLL Clock Buffer Features • 12/100-MHz (CY7B993V), or 24/185-MHz (CY7B994V) output operation • Matched p...

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-MHz (CY7B993V), or 24/185-MHz (CY7B994V) output operation • Matched pair outputs skew <200 ps • Zero input-to-output delay • 18 LVTTL 50% duty-cycle outputs capable of driving 50Ω terminated lines • Commercial Temp. Range with 16 outputs at 185 MHz • Industrial Temp. Range with 6 outputs at 185 MHz • 3.3V LVTTL/LV Differential (LVPECL), Fault Tolerant and Hot Insertable reference inputs • Phase adjustments in 625/1300 ps steps up to ±10.

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