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CY7C1010DV33 - 2-Mbit (256 K x 8) Static RAM

General Description

The CY7C1010DV33 is a high performance CMOS Static RAM organized as 256 K words by 8 bits.

Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and three-state drivers.

Key Features

  • Pin and function compatible with CY7C1010CV33.
  • High speed.
  • tAA = 10 ns.
  • Low active power.
  • ICC = 90 mA at 10 ns.
  • Low CMOS standby power.
  • ISB2 = 10 mA.
  • 2.0 V data retention.
  • Automatic power down when deselected.
  • TTL-compatible inputs and outputs.
  • Easy memory expansion with CE and OE features.
  • Available in Pb-free 36-pin SOJ and 44-pin TSOP II packages Functional.

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Other Datasheets by Cypress (now Infineon)

Part Number Description
CY7C1011BV33 128K x 16 Static RAM
CY7C1011CV33 128K x 16 Static RAM
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CY7C1018DV33 1-Mbit (128 K x 8) Static RAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CY7C1010DV33 2-Mbit (256 K × 8) Static RAM 2-Mbit (256 K × 8) Static RAM Features ■ Pin and function compatible with CY7C1010CV33 ■ High speed ❐ tAA = 10 ns ■ Low active power ❐ ICC = 90 mA at 10 ns ■ Low CMOS standby power ❐ ISB2 = 10 mA ■ 2.0 V data retention ■ Automatic power down when deselected ■ TTL-compatible inputs and outputs ■ Easy memory expansion with CE and OE features ■ Available in Pb-free 36-pin SOJ and 44-pin TSOP II packages Functional Description The CY7C1010DV33 is a high performance CMOS Static RAM organized as 256 K words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and three-state drivers. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW.