CY7C1021 Datasheet | Cypress

64K x 16 Static RAM Features - High speed - tAA = 12 ns - CMOS for optimum speed/power - Low active power - 1320 mW (max.) - Automatic power-down when deselected - Independent Control of Upper and Lower bits - Available in 44-pin TSOP II and 400-mil SOJ (BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is written into the location specified on the address pins (A0 through A15). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O9 through I/O16) is written into the location specified on the address pins (A0 through A15). Reading from the device is acplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the write enable (WE) HIGH....