Description
of read and write modes.
The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW).
Features
- High speed.
- tAA = 12 ns.
- Low active power.
- 612 mW (max. ).
- Low CMOS standby power (Commercial L version).
- 1.8 mW (max. ).
- 2.0V Data Retention (600 µW at 2.0V retention).
- Automatic power-down when deselected.
- TTL-compatible inputs and outputs.
- Easy memory expansion with CE and OE features written into the location specified on the address pins (A0 through A17). If Byte High Enable (BHE) is LOW, then data from.