CY7C1263KV18

CY7C1263KV18 is 36-Mbit QDR II+ SRAM Four-Word Burst Architecture manufactured by Cypress.

CY7C1263KV18 Datasheet

Part number	CY7C1263KV18
Download	CY7C1263KV18 Datasheet (PDF)
File Size	1.23 MB
Manufacturer	Cypress
Description	36-Mbit QDR II+ SRAM Four-Word Burst Architecture

Related Cypress Datasheets

Part Number	Description
CY7C1263V18	1.8V Synchronous Pipelined SRAM
CY7C1263XV18	36-Mbit QDR II+ Xtreme SRAM Four-Word Burst Architecture
CY7C1261V18	1.8V Synchronous Pipelined SRAM
CY7C1262XV18	36-Mbit QDR II+ Xtreme SRAM Two-Word Burst Architecture
CY7C1264XV18	36-Mbit QDR II+ Xtreme SRAM Two-Word Burst Architecture

CY7C1263KV18 Description

CY7C1263KV18/CY7C1265KV18 36-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) 36-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency).

CY7C1263KV18 Key Features

Separate independent read and write data ports
Supports concurrent transactions
550 MHz clock for high bandwidth
Four-word burst for reducing address bus frequency
Double data rate (DDR) Interfaces on both read and write ports
Available in 2.5 clock cycle latency
Two input clocks (K and K) for precise DDR timing
SRAM uses rising edges only
Echo clocks (CQ and CQ) simplify data capture in high speed
Data valid pin (QVLD) to indicate valid data on the output

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